The demand for integrated circuits (ICs) is not without challenges though: our modern digital economy and society require them to be more functional, more reliable, safer, and more secure, and fields like IoT, Cybersecurity, and High- performance computing are now priorities in many research agendas.

However, one critical obstacle in this evolution is variability, a culprit for the device parametric fluctuations deriving in a reliability loss of the IC. Rising right after fabrication (TZV, Time-Zero Variability) or during the IC lifetime (TDV, Time-Dependent Variability), it ends up critically compromising its functionality or even cutting short its lifetime. If variability is undealt with, ICs will no longer be able to fulfill the capabilities of safety, security, and reliability.

This talk tackles this challenge from two perspectives. It will first describe solutions and new design paradigms to lessen or tolerate variability; the goal is clear: mitigate its negative impact. Second, realizing variability has also a beneficial side, the talk will approach the paradigm of exploiting TZV and TDV for hardware-based security.

In mitigation, this talk will show some results from a reliability-aware design methodology that can create inherently robust ICs.

In exploitation, the goal is not only to analyze the impact of aging in conventional TZV-based cryptographic primitives (like the well-known Physically Unclonable Functions) but also to explore whether TDV could be used as a robust underlying entropy source.

But the first step to both mitigation and exploitation requires a deep understanding of variability. While TZV is well known, TDV needs a holistic approximation to its different effects (aging and RTN), and going from characterization to modeling requires a careful selection of which data and lab setups are needed (for the variables to experiment with are numerous). Only this will lead to efficient models and simulation strategies to design ICs for mitigation or exploitation.

This talk will provide a glimpse into the intricacies that careful TDV modeling requires.

Since 1998, he has been a Researcher with the Instituto de Microelectrónica de Sevilla (IMSE-CNM), where is a Tenured Scientist.

He has participated as a Researcher in several national and international research and development projects.

He has coauthored more than 100 international journals and conferences and has authored or edited five books and book chapters.

His current research interests include the design and design methodologies of analog, mixed- signal, and RF circuits, and reliable circuit design.

Dr. Castro has served as the General Chair and participated in the Program Committee for several international conferences.

He currently serves as an Associate Editor for the Integration, the VLSI Journal (Elsevier), and as expert collaborator in the ICT area of the State Research Agency.